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january 2016 docid028274 rev 3 1 / 14 this is information on a product in full production. www.st.com STL135N8F7AG automotive - grade n - channel 80 v, 3.15 m typ., 130 a stripfet? f7 power mosfet in a powerflat? 5x6 package datasheet - production data figure 1 : internal schematic diagram features order code v ds r ds(on) max. i d p tot STL135N8F7AG 80 v 3.6 m 130 a 135 w ? designed for automotive applications and aec - q101 qualified ? among the lowest r ds(on) on the market ? excellent figure of merit (fom) ? low c rss /c iss ratio for emi immu nity ? high avalanche ruggedness ? wettable flank package applications ? switching applications description this n - channel power mosfet utilizes stripfet? f7 technology with an enhanced trench gate structure that results in very low on - state resistance, while also reducing internal capacitance and gate charge for faster and more efficient switching. table 1: device summary order code marking package packing STL135N8F7AG 135n8f7 powerflat? 5x6 tape and reel
contents STL135N8F7AG 2 / 14 docid028274 rev 3 contents 1 electrical ratings ................................ ................................ ............. 3 2 electrical characteristics ................................ ................................ 4 2.1 electrical characteri stics (curves) ................................ ...................... 6 3 test circuits ................................ ................................ ..................... 8 4 package information ................................ ................................ ....... 9 4.1 powerflat? 5x6 wf type c package information .......................... 9 4.2 p owerflat? 5x6 wf packing information ................................ .... 11 5 revision history ................................ ................................ ............ 13
STL135N8F7AG electrical ratings docid028274 rev 3 3 / 14 1 electrical ratings table 2: absolute maximum ratings symbol parameter value unit v ds drain - source voltage 80 v v gs gate - source voltage 20 v i d (1) drain current (continuous) at t case = 25 c 130 a drain current (continuous) at t case = 100 c 93 i dm (1) (2) drain current (pulsed) 560 a i d (3) drain current (continuous) at t pcb = 25 c 26 a drain current (continuous) at t pcb = 100 c 19 i dm (2) (3) drain current (pulsed) 104 a p tot (1) total dissipation at t case = 25 c 135 w p tot (3) total dissipation at t pcb = 25 c 4.8 w e as (4) single pulse avalanche energy 1.2 j t stg storage temperature range - 55 to 175 c t j operating junction temperature range notes: (1) this value is rated according to r thj - c . (2) pulse width is limited by safe operating area. (3) this value is rated according to r thj - pcb (4) starting t j = 25 c, i d = 13 a, v dd = 50 v table 3: thermal data symbol parameter value unit r thj - pcb (1) thermal resistance junction - pcb 31.3 c/w r thj - case thermal resistance junction - case 1.1 notes: (1) when mounted on a 1 - inch2 fr - 4 board, 2oz cu, t < 10 s
electrical characteristics STL135N8F7AG 4 / 14 docid028274 rev 3 2 electrical characteristics (t case = 25 c unless otherwise specified) table 4: static symbol parameter test conditions min. typ. max. unit v (br)dss drain - source breakdown voltage v gs = 0 v, i d = 250 a 80 v i dss zero gate voltage drain current v gs = 0 v, v ds = 80 v 1 a v gs = 0 v, v ds = 80 v, t j = 125 c 10 i gss gate - body leakage current v ds = 0 v, v gs = 20 v 100 na v gs(th) gate threshold voltage v ds = v gs , i d = 250 a 2.5 4.5 v r ds(on) static drain - source on - resistance v gs = 10 v, i d = 13 a 3.15 3.6 m table 5: dynamic symbol parameter test conditions min. typ. max. unit c iss input capacitance v ds = 40 v, f = 1 mhz, v gs = 0 v - 6800 - pf c oss output capacitance - 1350 - c rss reverse transfer capacitance - 95 - q g total gate charge v dd = 40 v, i d = 26 a, v gs = 10 v (see figure 14: "test circuit for gate charge behavior" ) - 103 - nc q gs gate - source charge - 35 - q gd gate - drain charge - 28 - table 6: switching times symbol parameter test conditions min. typ. max. unit t d(on) turn - on delay time v dd = 40 v, i d = 13 a r g = 4.7 , v gs = 10 v (see figure 13: "test circuit for resistive load switching times" and figure 18: "switching time waveform" ) - 30 - ns t r rise time - 28 - t d(off) turn - off delay time - 73 - t f fall time - 30 -
STL135N8F7AG electrical characteristics docid028274 rev 3 5 / 14 table 7: source - drain diode symbol parameter test conditions min. typ. max. unit i sd source - drain current - 26 a i sdm (1) source - drain current (pulsed) - 104 a v sd (2) forward on voltage v gs = 0 v, i sd = 26 a - 1.2 v t rr reverse recovery time i sd = 26 a, di/dt = 100 a/s, v dd = 64 v (see figure 15: "test circuit for inductive load switching and diode recovery times" ) - 47 ns q rr reverse recovery charge - 66 nc i rrm reverse recovery current - 2.8 a notes: (1) pulse width is limited by safe operating area. (2) pulse test: pulse duration = 300 s, duty cycle 1.5%.
electrical characteristics STL135N8F7AG 6 / 14 docid028274 rev 3 2.1 electrical characteristics (curves) figure 2 : safe operating area figure 3 : thermal impedance figure 4 : output characteristics figure 5 : transfer characteristics figure 6 : gate charge vs gate - source voltage figure 7 : static drain - source on - resistance
STL135N8F7AG electrical characteristics docid028274 rev 3 7 / 14 figure 8 : capacitance variations figure 9 : normalized gate threshold voltage vs temperature figure 10 : normalized on - resistance vs temperature figure 11 : normalized v(br)dss vs temperature figure 12 : source - drain diode forward characteristics
test circuits STL135N8F7AG 8 / 14 docid028274 rev 3 3 test circuits figure 13 : test circuit for resistive load switching times figure 14 : test circuit for gate charge behavior figure 15 : test circuit for inductive load switching and diode recovery times figure 16 : unclamped inductive load test circuit figure 17 : unclamped inductive waveform figure 18 : switching time waveform
STL135N8F7AG package information docid028274 rev 3 9 / 14 4 package information in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and produ ct status are available at: www.st.com . ecopack ? is an st trademark. 4.1 powerflat? 5x6 wf type c package information figure 19 : powerflat? 5x6 wf type c package outline 8231817_wf_typec_r12
package information STL135N8F7AG 10 / 14 docid028274 rev 3 table 8: powerflat? 5x6 wf type c mechanical data dim. mm min. typ. max. a 0.80 1.00 a1 0.02 0.05 a2 0.25 b 0.30 0.50 c 5.80 6.00 6.20 d 5.00 5.20 5.40 d2 4.15 4.45 d3 4.05 4.20 4.35 d4 4.80 5.0 5.20 d5 0.25 0.4 0.55 d6 0.15 0.3 0.45 e 1.27 e 6.20 6.40 6.60 e2 3.50 3.70 e3 2.35 2.55 e4 0.40 0.60 e5 0.08 0.28 e6 0.2 0.325 0.450 e7 0.85 1.00 1.15 k 1.05 1.35 l 0.90 1.00 1.10 l1 0.175 0.275 0.375 0 12
STL135N8F7AG package information docid028274 rev 3 11 / 14 figure 20 : powerflat? 5x6 recommended footprint (dimensions are in mm) 4.2 powerflat? 5x6 wf packing information figure 21 : powerflat? 5x6 wf tape 8231817_footprint_rev_12
package information STL135N8F7AG 12 / 14 docid028274 rev 3 figure 22 : powerflat? 5x6 package orientation in carrier tape figure 23 : powerflat? 5x6 reel
STL135N8F7AG revision history docid028274 rev 3 13 / 14 5 revision history table 9: document revision history date revision changes 07 - sep - 2015 1 first release. 15 - sep - 2015 2 minor text edits. on cover page: - updated title and features 26 - jan - 2016 3 updated table 2: "absolute maximum ratings" and section 4.1: "powerflat? 5x6 wf type c package information" .
STL135N8F7AG 14 / 14 docid028274 rev 3 important notice C please read carefully stmicroelectronics nv and its subsidiaries (st) reserve the right to make changes, corrections, enhancements, modifications , and improvements to st products and/or to this document at any time without notice. purchasers should obtain the latest relevant information on st products before placing orders. st products are sold pursuant to sts terms and conditions of sale in place at the time of or der acknowledgement. purchasers are solely responsible for the choice, selection, and use of st products and s t assumes no liability for application assistance or the design of purchasers products. no license, express or implied, to any intellectual property right is granted by st herein. resale of st products with provisions different from the information se t forth herein shall void any warranty granted by st for such product. st and the st logo are trademarks of st. all other product or service names are the property of their respective owners. information in this document supersedes and replaces information previously supplied in any prior versions of this document. ? 2016 stmicroelectronics C all rights reserved

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